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digitalmars.D.learn - Why is the rex.w prefix not generated for certain instructions in

reply "Joseph Cassman" <jc7919 outlook.com> writes:
The following artificial code sample fails to compile (DMD 
2.063.2 run on Ubuntu 13.04 on an AMD Athlon II X4 635 processor)

     void main()
     {
         asm
         {
             mov   RAX,0x1ffffffffUL;
             mov   R8,0x1ffffffffUL;
             and   RAX,0xffffffffUL;
             and   R8,0xffffffffUL;
             and   RAX,0x1ffffffffUL;
         }
     }

with this error

     phi/rex.d(9): Error: bad type/size of operands 'and'
     Failed: 'dmd' '-v' '-o-' 'phi/rex.d' '-Iphi'

The error also appears for registers RBX,RCX,RDX,R8 through R15 
and the instructions or,xor,add,sub,cmp.

 From what I understand from the Intel documentation the registers 
R8 through R15 can be accessed by prefixing an instruction with 
an REX.R opcode. And an opcode prefix of REX.W promotes an 
instruction to 64-bits. I was thinking that this opcode was not 
being generated by the compiler. But the disassembly I get (using 
obj2asm, after removing the last statement that will not compile) 
leads me to believe that no particular opcode is provided.

     mov RAX,01FFFFFFFFh
     mov R8,01FFFFFFFFh
     and EAX,0FFFFFFFFh
     and R8,0FFFFFFFFh

So I'm out of ideas on where the error is coming from. Anyone got 
any ideas on what's going on here?

Thanks

Joseph
Sep 09 2013
parent reply "Joseph Cassman" <jc7919 outlook.com> writes:
On Monday, 9 September 2013 at 20:37:47 UTC, Joseph Cassman wrote:

 So I'm out of ideas on where the error is coming from. Anyone 
 got any ideas on what's going on here?


Still not sure what is going on but I found a work-around that 
somebody else might find useful.

The mov instruction is able to work with 64-bit values 
successfully so the value that is larger than 32 bits can be 
placed in a register and the register used for the operation. 
Here are few examples.

     void main()
     {
         asm
         {
             mov   RAX,0x1ffffffffUL;
             mov   R8,0xFFFFFFFFFFFFFFFFUL;
             and   R8,RAX;
             xor   R8,RAX;
             or    R8,RAX;
             add   R8,RAX;
             sub   R8,RAX;
             cmp   R8,RAX;
         }
     }

And their disassembly (excluding the nonessentials).

     mov RAX,01FFFFFFFFh
     mov R8,0FFFFFFFFFFFFFFFFh
     and R8,RAX
     xor R8,RAX
     or  R8,RAX
     add R8,RAX
     sub R8,RAX
     cmp R8,RAX

The only downside of the work-around is that there is already 
pressure on the limited number of registers in x64. Some 
shuffling might be required.

Joseph
Sep 11 2013
parent reply Brad Roberts <braddr puremagic.com> writes:
On 9/11/13 9:59 AM, Joseph Cassman wrote:

 On Monday, 9 September 2013 at 20:37:47 UTC, Joseph Cassman wrote:

 So I'm out of ideas on where the error is coming from. Anyone got any ideas on
what's going on here?


 Still not sure what is going on but I found a work-around that somebody else
might find useful.

 The mov instruction is able to work with 64-bit values successfully so the
value that is larger than
 32 bits can be placed in a register and the register used for the operation.
Here are few examples.

      void main()
      {
          asm
          {
              mov   RAX,0x1ffffffffUL;
              mov   R8,0xFFFFFFFFFFFFFFFFUL;
              and   R8,RAX;
              xor   R8,RAX;
              or    R8,RAX;
              add   R8,RAX;
              sub   R8,RAX;
              cmp   R8,RAX;
          }
      }

 And their disassembly (excluding the nonessentials).

      mov RAX,01FFFFFFFFh
      mov R8,0FFFFFFFFFFFFFFFFh
      and R8,RAX
      xor R8,RAX
      or  R8,RAX
      add R8,RAX
      sub R8,RAX
      cmp R8,RAX

 The only downside of the work-around is that there is already pressure on the
limited number of
 registers in x64. Some shuffling might be required.

 Joseph


Please file a bug for this.  http://d.puremagic.com/issues/
Sep 11 2013
next sibling parent "Joseph Cassman" <jc7919 outlook.com> writes:
On Wednesday, 11 September 2013 at 17:09:12 UTC, Brad Roberts 
wrote:

 Please file a bug for this.  http://d.puremagic.com/issues/


You got it.

Joseph
Sep 11 2013
prev sibling parent "Joseph Cassman" <jc7919 outlook.com> writes:
On Wednesday, 11 September 2013 at 17:09:12 UTC, Brad Roberts 
wrote:

 Please file a bug for this.  http://d.puremagic.com/issues/


http://d.puremagic.com/issues/show_bug.cgi?id=11071
Sep 19 2013